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2Gb: x16, x32 Mobile LPDDR2 SDRAM S4
AC Timing
Table 86: AC Timing (Continued)
Notes 1–2 apply to all parameters and conditions. AC timing parameters must satisfy the t CK minimum conditions (in mul-
tiples of t CK) as well as the timing specifications when values for both are indicated.
Min/M t CK
Data Rate
Parameter
Cumulative errors across 8 cy-
cles
Cumulative errors across 9 cy-
cles
Cumulative errors across 10 cy-
cles
Cumulative errors across 11 cy-
cles
Cumulative errors across 12 cy-
cles
Symbol
t ERR(8per),
allowed
t ERR(9per),
allowed
t ERR(10per),
allowed
t ERR(11per),
allowed
t ERR(12per),
allowed
ax
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
Min
–
–
–
–
–
–
–
–
–
–
1066
-217
217
-224
224
-231
231
-237
237
-242
242
933
-229
229
-237
237
-244
244
-250
250
-256
256
800
-241
241
-249
249
-257
257
-263
263
-269
269
667
-266
266
-274
274
-282
282
-289
289
-296
296
533
-290
290
-299
299
-308
308
-316
316
-323
323
400
-338
338
-349
349
-359
359
-368
368
-377
377
333
-362
362
-374
374
-385
385
-395
395
-403
403
Unit Notes
ps
ps
ps
ps
ps
Cumulative errors across n =
t ERR(nper),
MIN
t ERR(nper),allowed,min
= (1 + 0.68ln(n)) ×
ps
13, 14, 15…, 49, 50 cycles
allowed
t JIT(per),allowed,min
MAX
t ERR(nper),
allowed,max = (1 + 0.68ln(n)) ×
t JIT(per),allowed,max
ZQ Calibration Parameters
Initialization calibration time
Long calibration time
Short calibration time
Calibration RESET time
t ZQINIT
t ZQCL
t ZQCS
t ZQRESET
MIN
MIN
MIN
MIN
–
6
6
3
1
360
90
50
1
360
90
50
1
360
90
50
1
360
90
50
1
360
90
50
1
360
90
50
1
360
90
50
μ s
ns
ns
ns
READ Parameters 3
DQS output access time from
CK/CK#
t DQSCK
MIN
MAX
–
–
2500
5500
2500 2500 2500 2500 2500 2500
5500 5500 5500 5500 5500 5500
ps
DQSCK delta short
t DQSCKDS
MAX
–
330
380
450
540
670
900
1080
ps
4
DQSCK delta medium
t DQSCKDM
MAX
–
680
780
900
1050 1350 1800 1900
ps
5
DQSCK delta long
t DQSCKDL
MAX
–
920
1050 1200 1400 1800 2400
–
ps
6
DQS-DQ skew
Data-hold skew factor
t DQSQ
t QHS
MAX
MAX
–
–
200
230
220
260
240
280
280
340
340
400
400
480
500
600
ps
ps
DQS output HIGH pulse width
t QSH
MIN
–
t CH(abs)
- 0.05
t CK(a
vg)
DQS output LOW pulse width
t QSL
MIN
–
t CL(abs)
- 0.05
t CK(a
vg)
Data half period
t QHP
MIN
–
MIN
( t QSH, t QSL)
t CK(a
vg)
DQ/DQS output hold time from
t QH
MIN
–
t QHP
- t QHS
ps
DQS
PDF: 09005aef83f3f2eb
2gb_mobile_lpddr2_s4_g69a.pdf – Rev. N 3/12 EN
143
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